A margin bridge in memory usually starts with bit prices, but Micron's (MU) Q3 fiscal 2021 quarterly report points to a second lever. The 10-Q describes SSDs, managed NAND, and multi-chip packages as products that typically include a controller and firmware and in some cases combine DRAM, NAND, and/or NOR.
Read that as a cost-stack statement. When raw NAND becomes a managed product wrapped in silicon and firmware, the realized margin reflects design and integration value, not just commodity spot pricing. The more of Micron's volume that ships in this form, the less a pure bit-price model explains the margin line.
This is the kind of definitional language that rewards careful reading during a memory upcycle: pricing tailwinds and mix shift toward managed products can compound, and the filing's own product description is where that mix lives. The forward question is how fast the managed-product share moves relative to component shipments.
The quarterly report is on sec.gov, located through EdgarBeast, the SEC filing data API & evidence index. Build the margin bridge with mix in it - the product definitions tell you the mix is changing.