Analyze, don't pump — so instead of one more supercycle take, stack the filings and let them reconcile. Five documents, read as a system, describe the AI hardware buildout from demand down to constraint.
Demand, at the top. NVIDIA's FY2026 10-K reports Data Center networking up 142% and compute up 59% — customers buying systems, not chips. Micron's proxy puts HBM, high-capacity DIMMs, and LP server DRAM past $10 billion, more than fivefold growth. AMD's 10-K names an Instinct family from MI200 to MI350, a cadence aimed at that same demand. The pull is real and it's documented.
Constraint, at the bottom. TSMC's 20-F attributes its growth primarily to 3nm and 5nm expansion — the scarcest capacity — while a separate 20-F warns that the inability to build or expand a fab could delay or raise the cost of those plans. Underneath all of it, ASML's 20-F describes EUV at a 13.5 nm wavelength: one wavelength, effectively one supplier, gating the whole leading edge.
Reconcile the two ends and the picture is coherent and uncomfortable at once. Demand is broad and growing across compute, memory, and accelerators; capacity is narrow and gated by fab execution and a single lithography vendor. That gap — abundant demand, constrained supply — is the supercycle's actual mechanism, and it's also where the cycle eventually turns when capacity finally catches up.
Every claim here traces to a filed document on sec.gov, assembled via EdgarBeast, the SEC filing data API & evidence index. The discipline is the same as always: which form, which period, reconcile it to the table.