The capex-meets-IP fact first: transistor transitions are rarely clean breaks; foundries often run new and old device types side by side. US11575050B2, granted February 2023 to TSMC, patents a structure with both gate-all-around (GAA) and planar devices on one chip (CPC H01L 29/78696).
Gloss it once. GAA is the advanced transistor for high-performance logic, but not every circuit on a chip needs it — some functions are fine with simpler, cheaper planar devices. Building both on the same die lets a designer use the expensive transistor only where it pays off, optimizing area, power, and cost across the chip.
Why a capex desk reads it: this is the economics of a node transition made physical. Running two device types means more process steps and complexity, which is cost; but it also means the expensive new transistor is deployed selectively, which controls cost. The patent protects how to do that mixing manufacturably.
The period framing matters. In 2023, GAA was ramping at the leading edge. A patent on coexisting with planar devices reflects the practical reality that foundries do not flip the whole chip to the new device at once — transitions are managed, gradual, and add engineering overhead.
The caveat we attach: this is a structure patent and a defensive asset. It evidences TSMC's approach to mixed-device design; it does not quantify cost, yield, or which products use it.
For the period investor, the lesson is to distrust the clean-break narrative of node transitions. A 2023 GAA-and-planar grant shows the messy, expensive middle ground that the marketing node glosses over.