In the U.S. patent grant cycle dated March 31, 2026, Taiwan Semiconductor Manufacturing (TSM) was issued 47 patents that surface under a broad semiconductor search, and the densest part of that batch sits exactly where the foundry's leading-edge roadmap lives: the gate-all-around (GAA) nanosheet transistor. CPC subclass H10D 30/6735, the classification for nanosheet/nanowire field-effect transistors, is the single most common code across the week's TSMC grants. For the indispensable foundry, a granted transistor-structure claim is enforceable coverage of how its most advanced logic is built, the layer where it competes with Samsung and Intel Foundry for sub-3nm work.

The nanosheet cluster

Several grants in the batch claim distinct pieces of the nanosheet transistor. US12593504B2, "Transistors with varying width nanosheet," describes a nanosheet whose channel has a first region of one width and a second region of a larger width, a way to tune drive current and routing within a single device. US12593498B2 covers the manufacturing flow, releasing suspended nanosheets in a gate trench and wrapping them in a titanium-nitride layer with a sub-stoichiometric titanium-to-nitrogen ratio. The abstract states the release step directly:

Removing portions of the first semiconductor layers in the gate trench, such that the second semiconductor layers are suspended in the gate trench to serve as nanosheets.— Semiconductor device and forming method thereof, US12593498B2

The cluster continues with US12593494B2, a multi-gate device that uses a two-step shallow-trench-isolation recess to expose a different number of channel layers in two device-type regions, and US12593475B2, which claims a wall structure between two nanostructure stacks with a tightly bounded conductive-core thickness near that wall. US12593464B2 adds a two-sublayer dielectric for protecting the nanosheet stack. Together these are not one patent but a set of issued claims around the same device family, the geometry, the release process, the isolation, and the protective dielectric.

Beyond the channel: backside and packaging

The batch also reaches into the structures that surround the transistor. US12593459B2, "Backside memory integration," claims a device with a frontside interconnect over the source, drain, and gate and a backside interconnect beneath them holding a storage element, an architecture that uses the wafer's backside for more than power routing. US12593469B2 covers dual-side source/drain contacts on a nanostructured channel, contacting one source/drain from the front and another from the back. Backside processing of this kind is one of the defining structural shifts at the leading edge, and these grants place TSMC's versions inside issued claims.

Capacitor and lithography coverage rounds out the cycle. US12593460B2 claims a multi-tier deep-trench capacitor formed by bonding two capacitor assemblies electrode-to-electrode for higher capacitance. On the tooling side, US12591182B2 describes an EUV lithography system with a hollow connection member at the intermediate focus to deter tin debris from entering the scanner, while US12591181B2 covers contamination handling in a photoresist coating unit. EUV is the chokepoint of advanced manufacturing, and even contamination-control methods around it are coverage worth holding for a company running the world's largest leading-edge fleet.

Mapped against the full cycle, TSMC's 47 grants put it among the most active semiconductor filers of the week alongside Samsung, IBM, Micron, and Intel. The concentration is what stands out: the claims trace the leading-edge logic stack end to end, from the nanosheet channel and its release process, through backside power and memory integration, to the EUV and coating tooling that produces it. A granted claim is enforceable coverage, and this batch shows TSMC accumulating that coverage across the exact structures that define a sub-3nm node. The records do not tell us how broadly any single claim will read, or how it maps to a specific commercial node; they do show where the foundry now holds issued positions.